1474 search results - page 16 / 295 » Computing in Memory Architectures for Digital Image Processi... |
162
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FPGA
2010
ACM
15 years 2 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
109
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DPHOTO
2010
15 years 3 months ago
2010
Recent research demonstrates the advantage of designing electro-optical imaging systems by jointly optimizing the optical and digital subsystems. The optical systems designed usin...
IPPS
2000
IEEE
15 years 6 months ago
2000
IEEE
The paper presents a method to integrate parallelism in the DIPLIB sequential image processing library. The library contains several framework functions for di erent types of opera...
123
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JVCIR
2008
15 years 2 months ago
2008
This paper presents a novel hardware implementation of a disparity estimation scheme targeted to real-time Integral Photography (IP) image and video sequence compression. The soft...
131
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VLSID
2007
IEEE
16 years 2 months ago
2007
IEEE
The Discrete Wavelet Transform (DWT) forms the core of the JPEG2000 image compression algorithm. Since the JPEG2000 compression application is heavily data-intensive, the overall ...