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» Computing in the Presence of Timing Failures
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2008
IEEE
182views Hardware» more  DATE 2008»
14 years 3 months ago
A Novel Low Overhead Fault Tolerant Kogge-Stone Adder Using Adaptive Clocking
— As the feature size of transistors gets smaller, fabricating them becomes challenging. Manufacturing process follows various corrective design-for-manufacturing (DFM) steps to ...
Swaroop Ghosh, Patrick Ndai, Kaushik Roy
HPCA
2009
IEEE
14 years 9 months ago
Eliminating microarchitectural dependency from Architectural Vulnerability
The Architectural Vulnerability Factor (AVF) of a hardware structure is the probability that a fault in the structure will affect the output of a program. AVF captures both microa...
Vilas Sridharan, David R. Kaeli
ICST
2009
IEEE
14 years 3 months ago
A Simple Coverage-Based Locator for Multiple Faults
Fault localization helps spotting faults in source code by exploiting automatically collected data. Deviating from other fault locators relying on hit spectra or test coverage inf...
Friedrich Steimann, Mario Bertschler
ACSC
2005
IEEE
14 years 2 months ago
Dependable Dynamic Source Routing without a Trusted Third Party
Ad-hoc networks are frequently used to establish communication in improvised environments without requiring any fixed infrastructure. These networks are formed with the help of t...
Asad Amir Pirzada, Chris McDonald, Amitava Datta
DAC
2010
ACM
13 years 7 months ago
An error tolerance scheme for 3D CMOS imagers
A three-dimensional (3D) CMOS imager constructed by stacking a pixel array of backside illuminated sensors, an analog-to-digital converter (ADC) array, and an image signal process...
Hsiu-Ming Chang, Jiun-Lang Huang, Ding-Ming Kwai, ...