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IEEEPACT
2005
IEEE
14 years 2 months ago
Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors
This paper proposes a new hardware technique for using one core of a CMP to prefetch data for a thread running on another core. Our approach simply executes a copy of all non-cont...
Ilya Ganusov, Martin Burtscher
LICS
2005
IEEE
14 years 2 months ago
Model Checking Vs. Generalized Model Checking: Semantic Minimizations for Temporal Logics
Three-valued models, in which properties of a system are either true, false or unknown, have recently been advocated as a better representation for reactive program abstractions g...
Patrice Godefroid, Michael Huth
QSHINE
2005
IEEE
14 years 2 months ago
Link Scheduling with Power Control for Throughput Enhancement in Multihop Wireless Networks
Abstract— Throughput is an important performance consideration for multihop wireless networks. In this paper, we study the joint link scheduling and power control problem, focusi...
Jian Tang, Guoliang Xue, Christopher Chandler, Wei...
SBACPAD
2005
IEEE
139views Hardware» more  SBACPAD 2005»
14 years 2 months ago
Chained In-Order/Out-of-Order DoubleCore Architecture
Complexity is one of the most important problems facing microarchitects. It is exacerbated by the application of optimizations, by scaling to higher issue widths and, in general, ...
Miquel Pericàs, Adrián Cristal, Rube...
SENSYS
2005
ACM
14 years 2 months ago
Algorithms for generic role assignment in wireless sensor networks
We consider configuration of wireless sensor networks, where certain functions must be automatically assigned to sensor nodes, such that the properties of a sensor node (e.g., rem...
Christian Frank, Kay Römer