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» Concurrent Fault Detection in Random Combinational Logic
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NGC
1998
Springer
171views Communications» more  NGC 1998»
13 years 6 months ago
Programming Languages for Distributed Applications
Much progress has been made in distributed computing in the areas of distribution structure, open computing, fault tolerance, and security. Yet, writing distributed applications r...
Seif Haridi, Peter Van Roy, Per Brand, Christian S...
IOLTS
2003
IEEE
126views Hardware» more  IOLTS 2003»
13 years 12 months ago
Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits
A methodology for the synthesis of partially selfchecking multilevel logic circuits with low-cost paritybased concurrent error detection (CED) is described. A subset of the inputs...
Kartik Mohanram, Egor S. Sogomonyan, Michael G&oum...
DAC
1999
ACM
13 years 11 months ago
A Two-State Methodology for RTL Logic Simulation
This paper describes a two-state methodology for register transfer level (RTL) logic simulation in which the use of the Xstate is completely eliminated inside ASIC designs. Exampl...
Lionel Bening
VTS
2000
IEEE
89views Hardware» more  VTS 2000»
13 years 11 months ago
Fault Escapes in Duplex Systems
Hardware duplication techniques are widely used for concurrent error detection in dependable systems to ensure high availability and data integrity. These techniques are vulnerabl...
Subhasish Mitra, Nirmal R. Saxena, Edward J. McClu...
ASPLOS
2000
ACM
13 years 11 months ago
Slipstream Processors: Improving both Performance and Fault Tolerance
Processors execute the full dynamic instruction stream to arrive at the final output of a program, yet there exist shorter instruction streams that produce the same overall effec...
Karthik Sundaramoorthy, Zachary Purser, Eric Roten...