734 search results - page 91 / 147 » Configurable Transactional Memory |
DAC
2004
ACM
14 years 9 months ago
2004
ACM
Massive data transfer encountered in emerging multimedia embedded applications requires architecture allowing both highly distributed memory structure and multiprocessor computati...
HPCA
2007
IEEE
14 years 9 months ago
2007
IEEE
Memory bugs are a broad class of bugs that is becoming increasingly common with increasing software complexity, and many of these bugs are also security vulnerabilities. Unfortuna...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper presents a technique for memory optimization for a class of computations that arises in the field of correlated electronic structure methods such as coupled cluster and...
TC
2010
13 years 7 months ago
2010
—The number of CPUs in chip multiprocessors is growing at the Moore’s Law rate, due to continued technology advances. However, new technologies pose serious reliability challen...
ICEBE
2005
IEEE
14 years 2 months ago
2005
IEEE
Optimization of execution plans in information mediators is a critical task, specially when sources are remote and semistructured, as in the case of transactional web sites. Lack ...