6 search results - page 1 / 2 » Configurable VLSI Architecture for Deblocking Filter in H.26... |
TVLSI
2008
13 years 7 months ago
2008
In this paper, we study and analyze the computational complexity of the deblocking filter in H.264/AVC baseline decoder based on SimpleScalar/ARM simulator. The simulation result s...
VLSI
2007
Springer
14 years 1 months ago
2007
Springer
Abstract— In this paper, a low-power deblocking filter architecture for H.264/AVC is proposed. A hybrid filtering order has been adopted to boost the speed of the deblocking ...
ICIP
2004
IEEE
14 years 9 months ago
2004
IEEE
H.264/AVC is a new international standard for the compression of natural video images, in which a deblocking filter has been adopted to remove blocking artifacts. In this paper, w...
ASAP
2006
IEEE
13 years 9 months ago
2006
IEEE
This paper discusses hardware development of a realtime H.264/AVC video decoder. Synthesis results are presented for example implementations of the inverse quantization, inverse t...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
- We propose a near optimal hardware architecture for deblocking filter in H.264/MPEG-4 AVC. We propose a novel filtering order and a data reuse strategy that result in significant...