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PDP
2010
IEEE
14 years 1 days ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
ICSAP
2010
13 years 11 months ago
EEMLA: Energy Efficient Monitoring of Wireless Sensor Network with Learning Automata
— When sensors are redundantly deployed, a subset of sensors should be selected to actively monitor the field (referred to as a "cover"), while the rest of the sensors ...
Habib Mostafaei, Mohammad Reza Meybodi, Mehdi Esna...
NOCS
2008
IEEE
14 years 2 months ago
Network Simplicity for Latency Insensitive Cores
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
Daniel Gebhardt, JunBok You, W. Scott Lee, Kenneth...
IJPP
2011
105views more  IJPP 2011»
13 years 2 months ago
Correlating Radio Astronomy Signals with Many-Core Hardware
A recent development in radio astronomy is to replace traditional dishes with many small antennas. The signals are combined to form one large, virtual telescope. The enormous data ...
Rob van Nieuwpoort, John W. Romein
ICNP
2002
IEEE
14 years 20 days ago
Power Mode Scheduling for Ad Hoc Networks
An ad hoc network is a group of mobile wireless nodes that cooperatively form a network among themselves without any fixed infrastructure. Increasingly, power consumption within ...
Santashil PalChaudhuri, David B. Johnson