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ICCAD
2008
IEEE
153views Hardware» more  ICCAD 2008»
16 years 2 months ago
Breaking the simulation barrier: SRAM evaluation through norm minimization
— With process variation becoming a growing concern in deep submicron technologies, the ability to efficiently obtain an accurate estimate of failure probability of SRAM compone...
Lara Dolecek, Masood Qazi, Devavrat Shah, Anantha ...
ICCAD
2008
IEEE
140views Hardware» more  ICCAD 2008»
16 years 2 months ago
To SAT or not to SAT: Ashenhurst decomposition in a large scale
Functional decomposition is a fundamental operation in logic synthesis. Prior BDD-based approaches to functional decomposition suffer from the memory explosion problem and do not...
Hsuan-Po Lin, Jie-Hong Roland Jiang, Ruei-Rung Lee
ICCAD
2006
IEEE
180views Hardware» more  ICCAD 2006»
16 years 2 months ago
A bitmask-based code compression technique for embedded systems
Embedded systems are constrained by the available memory. Code compression techniques address this issue by reducing the code size of application programs. Dictionary-based code c...
Seok-Won Seong, Prabhat Mishra
ICCAD
2002
IEEE
108views Hardware» more  ICCAD 2002»
16 years 2 months ago
A precorrected-FFT method for simulating on-chip inductance
The simulation of on-chip inductance using PEEC-based circuit analysis methods often requires the solution of a subproblem where an extracted inductance matrix must be multiplied ...
Haitian Hu, David Blaauw, Vladimir Zolotov, Kaushi...
PDP
2010
IEEE
16 years 26 days ago
Lessons Learnt Porting Parallelisation Techniques for Irregular Codes to NUMA Systems
—This work presents a study undertaken to characterise the behaviour of some parallelisation techniques for irregular codes, previously developed for SMP architectures, on a seve...
Juan Angel Lorenzo, Juan Carlos Pichel, David LaFr...