49 search results - page 4 / 10 » Considering process variations during system-level power ana... |
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
In this paper, we propose a novel statistical model order reduction technique, called statistical spectrum model order reduction (SSMOR) method, which considers both intra-die and...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
Within-die variation in leakage power consumption is substantial and increasing for chip-level multiprocessors (CMPs) and multiprocessor systems-on-chip. Dealing with this problem...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
Circuit reliability is affected by various fabrication-time and run-time effects. Fabrication-induced process variation has significant impact on circuit performance and reliabilit...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Current Static Timing Analysis (STA) techniques allow one to verify the timing of a circuit at different process corners which only consider cases where all the supplies are low o...
ICST
2009
IEEE
14 years 2 months ago
2009
IEEE
Vulnerability discovery rates need to be taken into account for evaluating security risks. Accurate projection of these rates is required to estimate the effort needed to develop ...