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» Constant Multipliers for FPGAs
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FCCM
2006
IEEE
111views VLSI» more  FCCM 2006»
14 years 2 months ago
Pipelined Mixed Precision Algorithms on FPGAs for Fast and Accurate PDE Solvers from Low Precision Components
FPGAs are becoming more and more attractive for high precision scientific computations. One of the main problems in efficient resource utilization is the quadratically growing r...
Robert Strzodka, Dominik Göddeke
ASAP
2010
IEEE
315views Hardware» more  ASAP 2010»
13 years 6 months ago
A compact FPGA-based architecture for elliptic curve cryptography over prime fields
Abstract--This paper proposes an FPGA-based applicationspecific elliptic curve processor over a prime field. This research targets applications for which compactness is more import...
Jo Vliegen, Nele Mentens, Jan Genoe, An Braeken, S...
SBCCI
2009
ACM
187views VLSI» more  SBCCI 2009»
14 years 18 days ago
Design of low complexity digital FIR filters
The multiplication of a variable by multiple constants, i.e., the multiple constant multiplications (MCM), has been a central operation and performance bottleneck in many applicat...
Levent Aksoy, Diego Jaccottet, Eduardo Costa
IPPS
2003
IEEE
14 years 1 months ago
Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing
Partial reconfiguration allows for mapping and executing several tasks on an FPGA during runtime. Multitasking on FPGAs raises a number of questions on the management of the reco...
Herbert Walder, Christoph Steiger, Marco Platzner
INTEGRATION
2002
57views more  INTEGRATION 2002»
13 years 7 months ago
To Booth or not to Booth
Booth Recoding is a commonly used technique to recode one of the operands in binary multiplication. In this way the implementation of a multipliers' adder tree can be improve...
Wolfgang J. Paul, Peter-Michael Seidel