Sciweavers

82 search results - page 13 / 17
» Constrained software generation for hardware-software system...
Sort
View
CCS
2006
ACM
13 years 11 months ago
EXE: automatically generating inputs of death
This paper presents EXE, an effective bug-finding tool that automatically generates inputs that crash real code. Instead of running code on manually or randomly constructed input,...
Cristian Cadar, Vijay Ganesh, Peter M. Pawlowski, ...
ISCA
2010
IEEE
232views Hardware» more  ISCA 2010»
13 years 5 months ago
Evolution of thread-level parallelism in desktop applications
As the effective limits of frequency and instruction level parallelism have been reached, the strategy of microprocessor vendors has changed to increase the number of processing ...
Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mu...
CODES
2009
IEEE
14 years 2 months ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
ICSE
2007
IEEE-ACM
14 years 7 months ago
A Robust Semantic Overlay Network for Microgrid Control Applications
Abstract. Control systems for electrical microgrids rely ever more on heterogeneous off-the-shelf technology for hardware, software and networking among the intelligent electronic ...
Geert Deconinck, Koen Vanthournout, Hakem Beitolla...
CODES
2005
IEEE
14 years 1 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...