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CODES
2005
IEEE
14 years 29 days ago
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Girish Venkataramani, Tiberiu Chelcea, Seth Copen ...
CORR
2006
Springer
154views Education» more  CORR 2006»
13 years 7 months ago
Intra-site Level Cultural Heritage Documentation: Combination of Survey, Modeling and Imagery Data in a Web Information System
Cultural heritage documentation induces the use of computerized techniques to manage and preserve the information produced. Geographical information systems have proved their pote...
Anne Durand, Pierre Drap, Elise Meyer, Pierre Grus...
CODES
2006
IEEE
14 years 1 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
SIGSOFT
2006
ACM
14 years 8 months ago
Scenarios, goals, and state machines: a win-win partnership for model synthesis
Models are increasingly recognized as an effective means for elaborating requirements and exploring designs. For complex systems, model building is far from an easy task. Efforts ...
Christophe Damas, Bernard Lambeau, Axel van Lamswe...
ICST
2008
IEEE
14 years 1 months ago
On Combining Multi-formalism Knowledge to Select Models for Model Transformation Testing
Testing remains a major challenge for model transformation development. Test models that are used as test data for model transformations, are constrained by various sources of kno...
Sagar Sen, Benoit Baudry, Jean-Marie Mottu