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» Constraint Hierarchies and Logic Programming
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VTS
2006
IEEE
101views Hardware» more  VTS 2006»
14 years 1 months ago
Design Optimization for Robustness to Single Event Upsets
Abstract: An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU...
Quming Zhou, Mihir R. Choudhury, Kartik Mohanram
JFLP
2002
81views more  JFLP 2002»
13 years 7 months ago
A Practical Partial Evaluation Scheme for Multi-Paradigm Declarative Languages
We present a practical partial evaluation scheme for multi-paradigm declarative languages combining features from functional, logic, and concurrent programming. In contrast to pre...
Elvira Albert, Michael Hanus, Germán Vidal
ICFP
2008
ACM
14 years 7 months ago
Type checking with open type functions
We report on an extension of Haskell with open type-level functions and equality constraints that unifies earlier work on GADTs, functional dependencies, and associated types. The...
Tom Schrijvers, Simon L. Peyton Jones, Manuel M. T...
ASAP
1997
IEEE
144views Hardware» more  ASAP 1997»
13 years 12 months ago
Automatic data mapping of signal processing applications
This paper presents a technique to map automatically a complete digital signal processing (DSP) application onto a parallel machine with distributed memory. Unlike other applicati...
Corinne Ancourt, Denis Barthou, Christophe Guettie...
ICLP
2003
Springer
14 years 28 days ago
Flow Java: Declarative Concurrency for Java
Abstract. Logic variables pioneered by (concurrent) logic and concurrent constraint programming are powerful mechanisms for automatically synchronizing concurrent computations. The...
Frej Drejhammar, Christian Schulte, Per Brand, Sei...