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» Constraint Validation in Model Compilers
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MOR
2002
102views more  MOR 2002»
13 years 7 months ago
Facets of the Complementarity Knapsack Polytope
We present a polyhedral study of the complementarity knapsack problem. Traditionally, complementarity constraints are modeled by introducing auxiliary binary variables and additio...
Ismael R. de Farias Jr., Ellis L. Johnson, George ...
FGCN
2007
IEEE
14 years 2 months ago
Supporting Deadline Monotonic Policy over 802.11 MAC Layer Service Time Distribution
In this paper, we propose a real time scheduling policy over 802.11 DCF protocol called Deadline Monotonic (DM). We evaluate the performance of this policy for a simple scenario w...
Inès El Korbi, Leïla Azouz Saïdan...
ICPADS
2007
IEEE
14 years 2 months ago
Supporting deadline monotonic policy over 802.11 average service time analysis
In this paper, we propose a real time scheduling policy over 802.11 DCF protocol called Deadline Monotonic (DM). We evaluate the performance of this policy for a simple scenario w...
Inès El Korbi, Leïla Azouz Saïdan...
ISLPED
2000
ACM
68views Hardware» more  ISLPED 2000»
14 years 10 days ago
Speeding up power estimation of embedded software
Power is increasingly becoming a design constraint for embedded systems. A processor is responsible for energy consumption on account of the software component of the embedded sys...
Akshaye Sama, J. F. M. Theeuwen, M. Balakrishnan
DATE
2004
IEEE
114views Hardware» more  DATE 2004»
13 years 11 months ago
Power Aware Variable Partitioning and Instruction Scheduling for Multiple Memory Banks
Many high-end DSP processors employ both multiple memory banks and heterogeneous register files to improve performance and power consumption. The complexity of such architectures ...
Zhong Wang, Xiaobo Sharon Hu