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FPGA
2004
ACM
121views FPGA» more  FPGA 2004»
14 years 1 months ago
Divide and concatenate: a scalable hardware architecture for universal MAC
We present a cryptographic architecture optimization technique called divide-and-concatenate based on two observations: (i) the area of a multiplier and associated data path decre...
Bo Yang, Ramesh Karri, David A. McGrew
IWMM
2004
Springer
98views Hardware» more  IWMM 2004»
14 years 29 days ago
Dynamic object sampling for pretenuring
Many state-of-the-art garbage collectors are generational, collecting the young nursery objects more frequently than old objects. These collectors perform well because young objec...
Maria Jump, Stephen M. Blackburn, Kathryn S. McKin...
IWQOS
2004
Springer
14 years 29 days ago
Distributed on-line schedule adaptation for balanced slot allocation in wireless ad hoc networks
— We propose an algorithm for design and on the fly modification of the schedule of a wireless ad hoc network for provision of fair service guarantees under topological changes...
Theodoros Salonidis, Leandros Tassiulas
DATE
2003
IEEE
101views Hardware» more  DATE 2003»
14 years 27 days ago
Energy Estimation for Extensible Processors
This paper presents an efficient methodology for estimating the energy consumption of application programs running on extensible processors. Extensible processors, which are incr...
Yunsi Fei, Srivaths Ravi, Anand Raghunathan, Niraj...
FOCS
2003
IEEE
14 years 27 days ago
Approximation Algorithms for Asymmetric TSP by Decomposing Directed Regular Multigraphs
A directed multigraph is said to be d-regular if the indegree and outdegree of every vertex is exactly d. By Hall’s theorem one can represent such a multigraph as a combination ...
Haim Kaplan, Moshe Lewenstein, Nira Shafrir, Maxim...