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ICCAD
1995
IEEE
88views Hardware» more  ICCAD 1995»
15 years 7 months ago
LOT: logic optimization with testability-new transformations using recursive learning
: A new approach to optimize multi-level logic circuits is introduced. Given a multi-level circuit, the synthesis method optimizes its area, simultaneously enhancing its random pat...
Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...
ISLPED
2009
ACM
127views Hardware» more  ISLPED 2009»
15 years 10 months ago
Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic
In this paper, we observe that minimum energy Emin of subthreshold logic dramatically increases when reaching 45 nm node. We demonstrate by circuit simulation and analytical model...
David Bol, Dina Kamel, Denis Flandre, Jean-Didier ...
104
Voted
AAAI
2008
15 years 6 months ago
Integrating Multiple Learning Components through Markov Logic
This paper addresses the question of how statistical learning algorithms can be integrated into a larger AI system both from a practical engineering perspective and from the persp...
Thomas G. Dietterich, Xinlong Bao
130
Voted
ICCAD
2007
IEEE
103views Hardware» more  ICCAD 2007»
16 years 19 days ago
Enhancing design robustness with reliability-aware resynthesis and logic simulation
While circuit density and power efficiency increase with each major advance in IC technology, reliability with respect to soft errors tends to decrease. Current solutions to this...
Smita Krishnaswamy, Stephen Plaza, Igor L. Markov,...
123
Voted
DEXAW
2009
IEEE
129views Database» more  DEXAW 2009»
15 years 10 months ago
Pattern-Based Approach for Logical Traffic Isolation Forensic Modelling
— The use of design patterns usually changes the approach of software design and makes software development relatively easy. This paper extends work on a forensic model for Logic...
Innocentia Dlamini, Martin Olivier, Sihle Sibiya