Sciweavers

936 search results - page 181 / 188
» Context for Ubiquitous Data Management
Sort
View
ASPLOS
2009
ACM
16 years 6 months ago
RapidMRC: approximating L2 miss rate curves on commodity systems for online optimizations
Miss rate curves (MRCs) are useful in a number of contexts. In our research, online L2 cache MRCs enable us to dynamically identify optimal cache sizes when cache-partitioning a s...
David K. Tam, Reza Azimi, Livio Soares, Michael St...
HPCA
2008
IEEE
16 years 5 months ago
Supporting highly-decoupled thread-level redundancy for parallel programs
The continued scaling of device dimensions and the operating voltage reduces the critical charge and thus natural noise tolerance level of transistors. As a result, circuits can p...
M. Wasiur Rashid, Michael C. Huang
131
Voted
HPCA
2007
IEEE
16 years 5 months ago
LogTM-SE: Decoupling Hardware Transactional Memory from Caches
This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transaction's readand writ...
Luke Yen, Jayaram Bobba, Michael R. Marty, Kevin E...
142
Voted
EDBT
2002
ACM
120views Database» more  EDBT 2002»
16 years 5 months ago
Hyperdatabases: Infrastructure for the Information Space
The amount of stored information is exploding while, at the same time, tools for accessing relevant information are rather under-developed. Usually, all users have a pre-defined vi...
Hans-Jörg Schek
ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
15 years 12 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...