10 search results - page 2 / 2 » Control Flow Speculation in Multiscalar Processors |
ISCA
1992
IEEE
13 years 11 months ago
1992
IEEE
This paper discusses three techniques useful in relaxing the constraints imposed by control flow on parallelism: control dependence analysis, executing multiple flows of control s...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
Current processors exploit out-of-order execution and branch prediction to improve instruction level parallelism. When a branch prediction is wrong, processors flush the pipeline ...
ISCAPDCS
2003
13 years 8 months ago
2003
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
Multi-core processors, with low communication costs and high availability of execution cores, will increase the use of execution and compilation models that use short threads to e...