Sciweavers

26 search results - page 3 / 6
» Controller Synthesis for Mapping Partitioned Programs on Arr...
Sort
View
DAC
2007
ACM
14 years 9 months ago
Designer-Controlled Generation of Parallel and Flexible Heterogeneous MPSoC Specification
Programming multi-processor systems-on-chip (MPSoC) involves partitioning and mapping of sequential reference code onto multiple parallel processing elements. The immense potentia...
Pramod Chandraiah, Rainer Dömer
IPPS
2003
IEEE
14 years 1 months ago
Loop Dissevering: A Technique for Temporally Partitioning Loops in Dynamically Reconfigurable Computing Platforms
This paper presents a technique, called loop dissevering, to temporally partitioning any type of loop presented in programming languages. The technique can be used in the presence...
João M. P. Cardoso
RSP
2006
IEEE
102views Control Systems» more  RSP 2006»
14 years 2 months ago
Rapid Resource-Constrained Hardware Performance Estimation
In a hardware-software co-design environment, an application is partitioned into modules. Each module is then mapped either to software or to hardware. The mapping process is driv...
Basant Kumar Dwivedi, Arun Kejariwal, M. Balakrish...
ECBS
1996
IEEE
155views Hardware» more  ECBS 1996»
14 years 22 days ago
Model-Integrated Program Synthesis Environment
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...
Janos Sztipanovits, Gabor Karsai, Hubertus Franke
DAC
2002
ACM
14 years 9 months ago
Software synthesis from synchronous specifications using logic simulation techniques
This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. So...
Yunjian Jiang, Robert K. Brayton