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» Core Algorithms of the Maui Scheduler
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GLVLSI
2005
IEEE
132views VLSI» more  GLVLSI 2005»
14 years 1 months ago
FPGA implementation of a modular and pipelined WF scheduler for high speed OC192 networks
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
Abdallah Merhebi, Otmane Aït Mohamed
ICC
2009
IEEE
128views Communications» more  ICC 2009»
14 years 2 months ago
Cost and Target-Based Scheduling for Switch Power Control
—In this paper we propose two advanced algorithms which allow for both differentiated quality-of-service (QOS) and power conservation in input-queued packet switches. These algor...
Benjamin Yolken, Dimitrios Tsamis, Nicholas Bambos
PPOPP
2010
ACM
14 years 2 months ago
Thread to strand binding of parallel network applications in massive multi-threaded systems
In processors with several levels of hardware resource sharing, like CMPs in which each core is an SMT, the scheduling process becomes more complex than in processors with a singl...
Petar Radojkovic, Vladimir Cakarevic, Javier Verd&...
ISLPED
2004
ACM
123views Hardware» more  ISLPED 2004»
14 years 1 months ago
An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes
Increasing demand for larger high-performance applications requires developing more complex systems with hundreds of processing cores on a single chip. To allow dynamic voltage sc...
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
AINA
2007
IEEE
14 years 2 months ago
Context-Aware Elevator Scheduling
Abstract— Research on context-aware systems is usually usercentric and thus focussed on the context of a specific user to serve his or her needs in an optimized way. In this pap...
Thomas Strang, Christian Bauer