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ICCD
2006
IEEE
97views Hardware» more  ICCD 2006»
14 years 4 months ago
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Sa...
ICPP
2007
IEEE
14 years 1 months ago
Towards Optimized Packet Classification Algorithms for Multi-Core Network Processors
In this paper, a novel packet classification scheme optimized for multi-core network processors is proposed. The algorithm, Explicit Cuttings (ExpCuts), adopts a hierarchical spac...
Yaxuan Qi, Bo Xu, Fei He, Xin Zhou, Jianming Yu, J...
IEEEPACT
2007
IEEE
14 years 1 months ago
AA-Sort: A New Parallel Sorting Algorithm for Multi-Core SIMD Processors
Many sorting algorithms have been studied in the past, but there are only a few algorithms that can effectively exploit both SIMD instructions and threadlevel parallelism. In this...
Hiroshi Inoue, Takao Moriyama, Hideaki Komatsu, To...
DAC
2007
ACM
14 years 8 months ago
The KILL Rule for Multicore
Multicore has shown significant performance and power advantages over single cores in commercial systems with a 2-4 cores. Applying a corollary of Moore's Law for multicore, ...
Anant Agarwal, Markus Levy
ICPP
2008
IEEE
14 years 2 months ago
Memory Access Scheduling Schemes for Systems with Multi-Core Processors
On systems with multi-core processors, the memory access scheduling scheme plays an important role not only in utilizing the limited memory bandwidth but also in balancing the pro...
Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zh...