548 search results - page 49 / 110 » Core-Selectability in Chip Multiprocessors |
128
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CF
2005
ACM
15 years 6 months ago
2005
ACM
Thread-level speculative execution is a technique that makes it possible for a wider range of single-threaded applications to make use of the processing resources in a chip multip...
112
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IJPP
2006
15 years 4 months ago
2006
Chip multiprocessors hold great promise for achieving scalability in future systems. Microthreaded chip multiprocessors add a means of exploiting legacy code in such systems. Usin...
143
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HPCA
2008
IEEE
16 years 4 months ago
2008
IEEE
We apply Amdahl's Law to multicore chips using symmetric cores, asymmetric cores, and dynamic techniques that allows cores to work together on sequential execution. To Amdahl...
131
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ISCAS
2005
IEEE
15 years 9 months ago
2005
IEEE
Abstract — FPGAs offer excellent platform for System-onChips consisting of Intellectual Property (IP) blocks. The problem is that IP blocks and their interconnections are often F...
147
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ASPDAC
2009
ACM
15 years 10 months ago
2009
ACM
— Multiprocessors on a chip are the reality of these days. Semiconductor industry has recognized this approach as the most efficient in order to exploit chip resources, but the ...