548 search results - page 63 / 110 » Core-Selectability in Chip Multiprocessors |
154
click to vote
ISVLSI
2002
IEEE
15 years 9 months ago
2002
IEEE
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
148
click to vote
MICRO
2010
IEEE
15 years 1 months ago
2010
IEEE
As the number of cores on a single chip increases with more recent technologies, a packet-switched on-chip interconnection network has become a de facto communication paradigm for ...
163
click to vote
NOCS
2008
IEEE
15 years 10 months ago
2008
IEEE
We present a methodology to debug a SOC by concentrating on its communication. Our extended communication model includes a) multiple signal groups per interface protocol at each I...
156
click to vote
MICRO
2007
IEEE
15 years 10 months ago
2007
IEEE
Current on-chip block-centric memory hierarchies exploit access patterns at the fine-grain scale of small blocks. Several recently proposed techniques for coherence traffic reduct...
158
click to vote
RTSS
2006
IEEE
15 years 10 months ago
2006
IEEE
Modern FPGA devices, which include (multiple) processor core(s) as diffused IP on the silicon die, provide an excellent platform for developing custom multiprocessor systems-on-pr...