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ASPDAC
2006
ACM
137views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Parameterized block-based non-gaussian statistical gate timing analysis
As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...
Soroush Abbaspour, Hanif Fatemi, Massoud Pedram
GLVLSI
2006
IEEE
143views VLSI» more  GLVLSI 2006»
14 years 1 months ago
SACI: statistical static timing analysis of coupled interconnects
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
Hanif Fatemi, Soroush Abbaspour, Massoud Pedram, A...
DATE
2008
IEEE
204views Hardware» more  DATE 2008»
14 years 1 months ago
Deep Submicron Interconnect Timing Model with Quadratic Random Variable Analysis
Shrinking feature sizes and process variations are of increasing concern in modern technology. It is urgent that we develop statistical interconnect timing models which are harmon...
Jun-Kuei Zeng, Chung-Ping Chen
DAC
2005
ACM
14 years 8 months ago
Correlation-aware statistical timing analysis with non-gaussian delay distributions
Yaping Zhan, Andrzej J. Strojwas, Xin Li, Lawrence...
WCE
2007
13 years 8 months ago
A Model for the Statistical Distribution of Road Vehicle Vibrations
— This paper presents the initial results of a study aimed at improving the method by which the vibrations produced by transport vehicles are characterised and simulated. More sp...
Manuel-Alfredo Garcia-Romeu-Martinez, Vincent Roui...