237 search results - page 35 / 48 » Cost-Efficient Memory Architecture Design of NAND Flash Memo... |
DAC
2008
ACM
14 years 8 months ago
2008
ACM
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...
MOBISYS
2004
ACM
14 years 7 months ago
2004
ACM
ZebraNet is a mobile, wireless sensor network in which nodes move throughout an environment working to gather and process information about their surroundings [10]. As in many sen...
EH
2004
IEEE
13 years 11 months ago
2004
IEEE
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper presents the design and implementation of a thread virtual machine, called TNT (or TiNy-Threads) for the IBM Cyclops64 architecture (the latest Cyclops architecture tha...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...