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TCOS
2010
13 years 2 months ago
Green Secure Processors: Towards Power-Efficient Secure Processor Design
With the increasing wealth of digital information stored on computer systems today, security issues have become increasingly important. In addition to attacks targeting the softwar...
Siddhartha Chhabra, Yan Solihin
ASAP
2008
IEEE
120views Hardware» more  ASAP 2008»
13 years 9 months ago
Lightweight DMA management mechanisms for multiprocessors on FPGA
This paper presents a multiprocessor system on FPGA that adopts Direct Memory Access (DMA) mechanisms to move data between the external memory and the local memory of each process...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...
CODES
2005
IEEE
14 years 1 months ago
Enhancing security through hardware-assisted run-time validation of program data properties
The growing number of information security breaches in electronic and computing systems calls for new design paradigms that consider security as a primary design objective. This i...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
DAC
2004
ACM
14 years 8 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
RTAS
1997
IEEE
13 years 12 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford