237 search results - page 40 / 48 » Cost-Efficient Memory Architecture Design of NAND Flash Memo... |
CN
2002
13 years 6 months ago
2002
We describe the design, implementation and performance of a high-performance Web server accelerator which runs on an embedded operating system and improves Web server performance ...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
DATE
2003
IEEE
14 years 6 days ago
2003
IEEE
Reduction of both the test suite size and the download time of test vectors is important in today's System-On-a-Chip designs. In this paper, a method for compressing the scan...
CLUSTER
2008
IEEE
14 years 1 months ago
2008
IEEE
—The industry is now in agreement that the future of architecture design lies in multiple cores. As a consequence, all computer systems today, from embedded devices to petascale ...
EUROPAR
2009
Springer
13 years 10 months ago
2009
Springer
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...