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DATE
1999
IEEE
120views Hardware» more  DATE 1999»
13 years 12 months ago
FreezeFrame: Compact Test Generation Using a Frozen Clock Strategy
Test application time is an important factor in the overall cost of VLSI chip testing. We present a new ATPG approach for generating compact test sequences for sequential circuits...
Yanti Santoso, Matthew C. Merten, Elizabeth M. Rud...
EGOV
2008
Springer
13 years 9 months ago
Test Strategies for Evaluation of Semantic eGovernment Applications
In this paper we present a framework for identifying the test focus and test objectives based on the assumption that automatic information processing based on encoded meaning is th...
Ralf Klischewski, Stefan Ukena
ITC
2003
IEEE
139views Hardware» more  ITC 2003»
14 years 28 days ago
A Hybrid Coding Strategy For Optimized Test Data Compression
Store-and-generate techniques encode a given test set and regenerate the original test set during the test with the help of a decoder. Previous research has shown that runlength c...
Armin Würtenberger, Christofer S. Tautermann,...
DDECS
2008
IEEE
184views Hardware» more  DDECS 2008»
14 years 2 months ago
Software-Based Self-Test Strategy for Data Cache Memories Embedded in SoCs
— Testing SoC is a challenging task, especially when addressing complex and highfrequency devices. Among the different techniques that can be exploited, Software-Based Selft-Test...
Wilson J. Perez, Jaime Velasco-Medina, Danilo Ravo...
ICST
2011
IEEE
12 years 11 months ago
Applying aggressive propagation-based strategies for testing changes
—Test-suite augmentation for evolving software— the process of augmenting a test suite to adequately test software changes—is necessary for any program that undergoes modifi...
Raúl A. Santelices, Mary Jean Harrold