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» Costs of General Purpose Learning
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FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
14 years 1 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
SAMOS
2007
Springer
14 years 1 months ago
Online Prediction of Applications Cache Utility
— General purpose architectures are designed to offer average high performance regardless of the particular application that is being run. Performance and power inefficiencies a...
Miquel Moretó, Francisco J. Cazorla, Alex R...
IPPS
2006
IEEE
14 years 1 months ago
Compatible phase co-scheduling on a CMP of multi-threaded processors
The industry is rapidly moving towards the adoption of Chip Multi-Processors (CMPs) of Simultaneous MultiThreaded (SMT) cores for general purpose systems. The most prominent use o...
Ali El-Moursy, R. Garg, David H. Albonesi, Sandhya...
CODES
2005
IEEE
14 years 1 months ago
CRAMES: compressed RAM for embedded systems
Memory is a scarce resource in many embedded systems. Increasing memory often increases packaging and cooling costs, size, and energy consumption. This paper presents CRAMES, an e...
Lei Yang, Robert P. Dick, Haris Lekatsas, Srimat T...
SC
2005
ACM
14 years 1 months ago
Leading Computational Methods on Scalar and Vector HEC Platforms
The last decade has witnessed a rapid proliferation of superscalar cache-based microprocessors to build high-end computing (HEC) platforms, primarily because of their generality, ...
Leonid Oliker, Jonathan Carter, Michael F. Wehner,...