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DFT
2006
IEEE
105views VLSI» more  DFT 2006»
14 years 1 months ago
Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
Zhiyuan He, Zebo Peng, Petru Eles, Paul M. Rosinge...
DAC
2008
ACM
14 years 8 months ago
On reliable modular testing with vulnerable test access mechanisms
In modular testing of system-on-a-chip (SoC), test access mechanisms (TAMs) are used to transport test data between the input/output pins of the SoC and the cores under test. Prio...
Lin Huang, Feng Yuan, Qiang Xu
COMPSAC
2009
IEEE
14 years 8 days ago
How Well Do Test Case Prioritization Techniques Support Statistical Fault Localization
—In continuous integration, a tight integration of test case prioritization techniques and fault-localization techniques may both expose failures faster and locate faults more ef...
Bo Jiang, Zhenyu Zhang, T. H. Tse, Tsong Yueh Chen
TAICPART
2010
IEEE
126views Education» more  TAICPART 2010»
13 years 6 months ago
Improved Testing through Refactoring: Experience from the ProTest Project
We report on how the Wrangler refactoring tool has been used to improve and transform test code for Erlang systems. This has been achieved through the removal of code clones, the i...
Huiqing Li, Simon J. Thompson
AIPS
1994
13 years 9 months ago
Testing Incremental Adaptation
A robot system operating in an environmentin which there is uncertainty and changeneeds to combinethe ability to react withthe ability to plan ahead. In a previous paper wepropose...
Damian M. Lyons, Antonius J. Hendriks