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» Course on System Design (structural approach)
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DAC
2010
ACM
13 years 10 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
CONCURRENCY
1998
87views more  CONCURRENCY 1998»
13 years 9 months ago
Titanium: A High-performance Java Dialect
Titanium is a language and system for high-performance parallel scientific computing. Titanium uses Java as its base, thereby leveraging the advantages of that language and allow...
Katherine A. Yelick, Luigi Semenzato, Geoff Pike, ...
FPGA
2009
ACM
273views FPGA» more  FPGA 2009»
14 years 4 months ago
A parallel/vectorized double-precision exponential core to accelerate computational science applications
Many natural processes exhibit exponential decay and, consequently, computational scientists make extensive use of e−x in computer simulation experiments. While it is common to ...
Robin Pottathuparambil, Ron Sass
ISPASS
2007
IEEE
14 years 4 months ago
CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications
This paper proposes a specialized memory structure called CA-RAM (Content Addressable Random Access Memory) to accelerate search operations present in many important real-world ap...
Sangyeun Cho, Joel R. Martin, Ruibin Xu, Mohammad ...
MOBICOM
2003
ACM
14 years 3 months ago
MiSer: an optimal low-energy transmission strategy for IEEE 802.11a/h
Reducing the energy consumption by wireless communication devices is perhaps the most important issue in the widely-deployed and exponentially-growing IEEE 802.11 Wireless LANs (W...
Daji Qiao, Sunghyun Choi, Amit Jain, Kang G. Shin