46 search results - page 3 / 10 » Cox-Rower Architecture for Fast Parallel Montgomery Multipli... |
RECONFIG
2008
IEEE
14 years 1 months ago
2008
IEEE
1 We present a fast, efficient, and parameterized modular multiplier and a secure exponentiation circuit especially intended for FPGAs on the low end of the price range. The desig...
IPPS
2008
IEEE
14 years 1 months ago
2008
IEEE
Recently a GPU has acquired programmability to perform general purpose computation fast by running ten thousands of threads concurrently. This paper presents a new algorithm for d...
ISCA
2011
IEEE
12 years 11 months ago
2011
IEEE
As the number of cores on a single-chip grows, scalable barrier synchronization becomes increasingly difficult to implement. In software implementations, such as the tournament ba...
CAMP
2005
IEEE
14 years 1 months ago
2005
IEEE
— In this paper, we propose a new architecture that can extract information of numerous objects in an image at highspeed. Various characteristics can be obtained from the image m...
FPGA
2008
ACM
13 years 9 months ago
2008
ACM
Stochastic simulations and other scientific applications that depend on random numbers are increasingly implemented in a parallelized manner in programmable logic. High-quality ps...