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ISCA
2005
IEEE
134views Hardware» more  ISCA 2005»
14 years 3 months ago
An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors
Instruction set customization is an effective way to improve processor performance. Critical portions of application dataflow graphs are collapsed for accelerated execution on s...
Nathan Clark, Jason A. Blome, Michael L. Chu, Scot...
EURODAC
1995
IEEE
202views VHDL» more  EURODAC 1995»
14 years 1 months ago
Hardware-software co-synthesis of fault-tolerant real-time distributed embedded systems
Distributed systems are becoming a popular way of implementing many embedded computing applications, automotive control being a common and important example. Such embedded systems...
Santhanam Srinivasan, Niraj K. Jha
FPGA
1995
ACM
149views FPGA» more  FPGA 1995»
14 years 1 months ago
PathFinder: A Negotiation-based Performance-driven Router for FPGAs
Routing FPGAs is a challenging problem because of the relative scarcity of routing resources, both wires and connection points. This can lead either to slow implementations caused...
Larry McMurchie, Carl Ebeling
TCAD
2008
106views more  TCAD 2008»
13 years 9 months ago
Track Routing and Optimization for Yield
Abstract--In this paper, we propose track routing and optimization for yield (TROY), the first track router for the optimization of yield loss due to random defects. As the probabi...
Minsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan
BC
2005
106views more  BC 2005»
13 years 9 months ago
Phase transitions in the neuropercolation model of neural populations with mixed local and non-local interactions
Abstract We model the dynamical behavior of the neuropil, the densely interconnected neural tissue in the cortex, using neuropercolation approach. Neuropercolation generalizes phas...
Robert Kozma, Marko Puljic, Paul Balister, B&eacut...