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ISCA
2010
IEEE
247views Hardware» more  ISCA 2010»
13 years 11 months ago
An integrated GPU power and performance model
GPU architectures are increasingly important in the multi-core era due to their high number of parallel processors. Performance optimization for multi-core processors has been a c...
Sunpyo Hong, Hyesoon Kim
IPPS
2007
IEEE
14 years 1 months ago
Power-Aware Speedup
Power-aware processors operate in various power modes to reduce energy consumption with a corresponding decrease in peak processor throughput. Recent work has shown power-aware cl...
Rong Ge, Kirk W. Cameron
IPPS
1998
IEEE
13 years 11 months ago
Partial Rearrangements of Space-Shared FPGAs
Abstract Oliver Diessel1 and Hossam ElGindy2 1Department of Computer Science and Software Engineering 2Department of Electrical and Computer Engineering The University of Newcastle...
Oliver Diessel, Hossam A. ElGindy
CONCUR
1999
Springer
13 years 11 months ago
Partial Order Reduction for Model Checking of Timed Automata
Abstract. The paper presents a partial order reduction method applicable to networks of timed automata. The advantage of the method is that it reduces both the number of explored c...
Marius Minea
ICS
2001
Tsinghua U.
13 years 12 months ago
Global optimization techniques for automatic parallelization of hybrid applications
This paper presents a novel technique to perform global optimization of communication and preprocessing calls in the presence of array accesses with arbitrary subscripts. Our sche...
Dhruva R. Chakrabarti, Prithviraj Banerjee