60 search results - page 8 / 12 » Crosstalk Reduction in Area Routing |
VLSID
2005
IEEE
14 years 10 months ago
2005
IEEE
Buffer insertion method plays a great role in modern VLSI design. Many buffer insertion algorithms have been proposed in recent years. However, most of them used simplified delay ...
FPL
2009
Springer
14 years 2 months ago
2009
Springer
Networks-on-Chips (NoCs) are an emerging communication topology paradigm in single chip VLSI design, enhancing parallelism and system scalability. Processing units (PUs) connect t...
ISPD
2004
ACM
14 years 3 months ago
2004
ACM
Due to increasing design complexity, routing congestion has become a critical problem in VLSI designs. This paper introduces a distributed metric to predict routing congestion for...
ICNP
2006
IEEE
14 years 3 months ago
2006
IEEE
Abstract—We propose a solution to improve fairness and increase throughput in wireless networks with location information. Our approach consists of a multipath routing protocol, ...
DAC
2011
ACM
12 years 9 months ago
2011
ACM
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...