8 search results - page 1 / 2 » Custom Instruction Generation Using Temporal Partitioning Te... |
EUC
2006
Springer
13 years 11 months ago
2006
Springer
Extracting appropriate custom instructions is an important phase for implementing an application on an extensible processor with a reconfigurable functional unit (RFU). Custom inst...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
This paper presents a reconfigurable functional unit (RFU) for an adaptive dynamic extensible processor. The processor can tune its extended instructions to the target application...
ERSA
2009
13 years 5 months ago
2009
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
ASAP
2007
IEEE
13 years 9 months ago
2007
IEEE
FPGA (Field Programmable Gate Array) based reconfigurable processor has been shown to meet the increasingly challenging performance targets and shorter time-to-market pressures. I...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
This paper shows that software pipelining can be an effective technique for code generation for coarse-grained reconfigurable instruction set processors. The paper describes a tec...