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ARCS
2005
Springer
14 years 2 months ago
An FPGA Dynamically Reconfigurable Framework for Modular Robotics
Dynamic Reconfiguration has always constituted a challenge for embedded systems designers. Nowadays, technological developments make possible to do it on Xilinx FPGAs, but setting...
Andres Upegui, Rico Moeckel, Elmar Dittrich, Auke ...
ICSE
2001
IEEE-ACM
14 years 1 months ago
A Web-Oriented Architectural Aspect for the Emerging Computational Tapestry
An emerging tapestry of computations will soon integrate systems around the globe. It will evolve without central control. Its complexity will be vast. We need new ideas, tools an...
Kevin J. Sullivan, Avneesh Saxena
INFOVIS
2003
IEEE
14 years 1 months ago
A Visual Workspace for Hybrid Multidimensional Scaling Algorithms
In visualising multidimensional data, it is well known that different types of data require different types of algorithms to process them. Data sets might be distinguished accordi...
Greg Ross, Matthew Chalmers
DAC
2004
ACM
14 years 9 months ago
High level cache simulation for heterogeneous multiprocessors
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Don...
IPPS
1998
IEEE
14 years 24 days ago
Vector Prefix and Reduction Computation on Coarse-Grained, Distributed-Memory Parallel Machines
Vector prefix and reduction are collective communication primitives in which all processors must cooperate. We present two parallel algorithms, the direct algorithm and the split ...
Seungjo Bae, Dongmin Kim, Sanjay Ranka