25 search results - page 2 / 5 » DFFT : Design For Functional Testability |
ATS
1997
IEEE
13 years 12 months ago
1997
IEEE
This paper considers the testability implications of low power design methodologies. Low power and high testability are shown to be highly contrasting requirements, and an optimiz...
VLSID
1998
IEEE
13 years 12 months ago
1998
IEEE
With several commercial tools becoming available, the high-level synthesis of applicationspeci c integrated circuits is nding wide spread acceptance in VLSI industry today. Existi...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
VTS
1996
IEEE
13 years 12 months ago
1996
IEEE
Designing a testable circuit is often a two step process. First, the circuit is designed to conform to the functional specifications. Then, the testability aspects are added. By t...
ICST
2008
IEEE
14 years 2 months ago
2008
IEEE
Evidence suggests that as software ages the original realizations of design patterns remain in place, and participants in design pattern realizations accumulate “grime” – no...