Sciweavers

2317 search results - page 163 / 464
» DMVIS: Design, Modelling and Validation of Interactive Syste...
Sort
View
DAC
2000
ACM
14 years 9 months ago
GTX: the MARCO GSRC technology extrapolation system
Technology extrapolation -- the calibration and prediction of achievable design in future technology generations ? drives the evolution of VLSI system architectures, design method...
Andrew E. Caldwell, Yu Cao, Andrew B. Kahng, Farin...
GI
1998
Springer
14 years 16 days ago
Self-Organizing Data Mining
"KnowledgeMiner" was designed to support the knowledge extraction process on a highly automated level. Implemented are 3 different GMDH-type self-organizing modeling algo...
Frank Lemke, Johann-Adolf Müller
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
13 years 8 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...
ESTIMEDIA
2009
Springer
14 years 2 months ago
System-level MP-SoC design space exploration using tree visualization
— The complexity of today’s embedded systems forces designers to model and simulate systems and their components to explore the wide range of design choices. Such design space ...
Toktam Taghavi, Andy D. Pimentel, Mark Thompson
TCAD
2002
146views more  TCAD 2002»
13 years 8 months ago
Static scheduling of multidomain circuits for fast functional verification
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
Murali Kudlugi, Russell Tessier