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VLSID
2005
IEEE
139views VLSI» more  VLSID 2005»
16 years 3 months ago
Variable Input Delay CMOS Logic for Low Power Design
Modern digital circuits consist of logic gates implemented in the complementary metal oxide semiconductor (CMOS) technology. The time taken for a logic gate output to change after...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
POPL
2008
ACM
16 years 3 months ago
Demand-driven alias analysis for C
This paper presents a demand-driven, flow-insensitive analysis algorithm for answering may-alias queries. We formulate the computation of alias queries as a CFL-reachability probl...
Xin Zheng, Radu Rugina
POPL
2007
ACM
16 years 3 months ago
Specialization of CML message-passing primitives
Concurrent ML (CML) is a statically-typed higher-order concurrent language that is embedded in Standard ML. Its most notable feature is its support for first-class synchronous ope...
John H. Reppy, Yingqi Xiao
POPL
2005
ACM
16 years 3 months ago
Precise interprocedural analysis using random interpretation
We describe a unified framework for random interpretation that generalizes previous randomized intraprocedural analyses, and also extends naturally to efficient interprocedural an...
Sumit Gulwani, George C. Necula
POPL
2003
ACM
16 years 3 months ago
Interprocedural compatibility analysis for static object preallocation
We present an interprocedural and compositional algorithm for finding pairs of compatible allocation sites, which have the property that no object allocated at one site is live at...
Ovidiu Gheorghioiu, Alexandru Salcianu, Martin C. ...
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