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» DNS performance and the effectiveness of caching
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ISCA
2005
IEEE
181views Hardware» more  ISCA 2005»
14 years 1 months ago
Adaptive Mechanisms and Policies for Managing Cache Hierarchies in Chip Multiprocessors
With the ability to place large numbers of transistors on a single silicon chip, manufacturers have begun developing chip multiprocessors (CMPs) containing multiple processor core...
Evan Speight, Hazim Shafi, Lixin Zhang, Ramakrishn...
IESS
2009
Springer
182views Hardware» more  IESS 2009»
13 years 5 months ago
Modeling Cache Effects at the Transaction Level
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
Ardavan Pedram, David Craven, Andreas Gerstlauer
MOBIQUITOUS
2007
IEEE
14 years 1 months ago
A SpatioTemporal Placement Model for Caching Location Dependent Queries
Client side caching of location dependent queries is an important technique for improving performance of location-based services. Most of the existing research in this area has fo...
Anand Murugappan, Ling Liu
ACISICIS
2005
IEEE
14 years 1 months ago
An Effective Cache Overlapping Storage Structure for SMT Processors
Simultaneous Multithreaded (SMT) processors improve the instruction throughput by allowing fetching and running instructions from several threads simultaneously at a single cycle....
Liqiang He, Zhiyong Liu
ISCA
2011
IEEE
290views Hardware» more  ISCA 2011»
12 years 11 months ago
Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks
To meet the demand for more powerful high-performance shared-memory servers, multiprocessor systems must incorporate efficient and scalable cache coherence protocols, such as thos...
Blas Cuesta, Alberto Ros, María Engracia G&...