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» DRAMSim2: A Cycle Accurate Memory System Simulator
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ACMMSP
2005
ACM
99views Hardware» more  ACMMSP 2005»
14 years 1 months ago
Gated memory control for memory monitoring, leak detection and garbage collection
ct In the past, program monitoring often operates at the code level, performing checks at function and loop boundaries. Recent research shows that profiling analysis can identify ...
Chen Ding, Chengliang Zhang, Xipeng Shen, Mitsunor...
CODES
2008
IEEE
13 years 9 months ago
Application specific non-volatile primary memory for embedded systems
Memory subsystems have been considered as one of the most critical components in embedded systems and furthermore, displaying increasing complexity as application requirements div...
Kwangyoon Lee, Alex Orailoglu
FDL
2007
IEEE
14 years 1 months ago
Modelling Alternatives for Cycle Approximate Bus TLMs
Transaction level models (TLMs) can be constructed at t levels of abstraction, denoted as untimed (UT), cycle-approximate (CX), and cycle accurate (CA) in this paper. The choice o...
Martin Radetzki, Rauf Salimi Khaligh
DAC
1999
ACM
14 years 8 months ago
Memory Exploration for Low Power, Embedded Systems
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
Wen-Tsong Shiue, Chaitali Chakrabarti
ISPASS
2005
IEEE
14 years 1 months ago
Accelerating Multiprocessor Simulation with a Memory Timestamp Record
We introduce a fast and accurate technique for initializing the directory and cache state of a multiprocessor system based on a novel software structure called the memory timestam...
Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste A...