3 search results - page 1 / 1 » DS-LFSR: a BIST TPG for low switching activity |
TCAD
2002
13 years 10 months ago
2002
A test pattern generator (TPG) for built-in self-test (BIST), which can reduce switching activity during test application, is proposed. The proposed TPG, called dual-speed LFSR (DS...
ISCAS
1999
IEEE
14 years 3 months ago
1999
IEEE
ICCD
2002
IEEE
14 years 8 months ago
2002
IEEE
Low power design techniques have been employed for more than two decades, however an emerging problem is satisfying the test power constraints for avoiding destructive test and im...