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HOTI
2008
IEEE
14 years 3 months ago
A High-Speed Optical Multi-Drop Bus for Computer Interconnections
Buses have historically provided a flexible communications structure in computer systems. However, signal integrity constraints of high-speed electronics have made multi-drop elec...
Michael R. T. Tan, Paul Rosenberg, Jong Souk Yeo, ...
MICRO
2010
IEEE
149views Hardware» more  MICRO 2010»
13 years 6 months ago
ReMAP: A Reconfigurable Heterogeneous Multicore Architecture
This paper presents ReMAP, a reconfigurable architecture geared towards accelerating and parallelizing applications within a heterogeneous CMP. In ReMAP, threads share a common rec...
Matthew A. Watkins, David H. Albonesi
FSKD
2008
Springer
123views Fuzzy Logic» more  FSKD 2008»
13 years 10 months ago
PartSpan: Parallel Sequence Mining of Trajectory Patterns
The trajectory pattern mining problem has recently attracted increasing attention. This paper precisely addresses the parallel mining problem of trajectory patterns as well as the...
Shaojie Qiao, Changjie Tang, Shucheng Dai, Mingfan...
SIAMSC
2011
140views more  SIAMSC 2011»
12 years 11 months ago
A Fast Parallel Algorithm for Selected Inversion of Structured Sparse Matrices with Application to 2D Electronic Structure Calcu
Abstract. An efficient parallel algorithm is presented and tested for computing selected components of H−1 where H has the structure of a Hamiltonian matrix of two-dimensional la...
Lin Lin, Chao Yang, Jianfeng Lu, Lexing Ying, Wein...
IEEEPACT
2009
IEEE
14 years 3 months ago
DDCache: Decoupled and Delegable Cache Data and Metadata
Abstract—In order to harness the full compute power of manycore processors, future designs must focus on effective utilization of on-chip cache and bandwidth resources. In this p...
Hemayet Hossain, Sandhya Dwarkadas, Michael C. Hua...