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» Data Speculation Support for a Chip Multiprocessor
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HPCA
2007
IEEE
14 years 7 months ago
Extending Multicore Architectures to Exploit Hybrid Parallelism in Single-thread Applications
Chip multiprocessors with multiple simpler cores are gaining popularity because they have the potential to drive future performance gains without exacerbating the problems of powe...
Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlk...
MICRO
2006
IEEE
117views Hardware» more  MICRO 2006»
14 years 1 months ago
PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection
Dynamic software bug detection tools are commonly used because they leverage run-time information. However, they suffer from a fundamental limitation, the Path Coverage Problem: t...
Shan Lu, Pin Zhou, Wei Liu, Yuanyuan Zhou, Josep T...
TC
2008
13 years 7 months ago
Secure Memory Accesses on Networks-on-Chip
Security is gaining relevance in the development of embedded devices. Toward a secure system at each level of design, this paper addresses security aspects related to Network-on-Ch...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...
PPL
2006
81views more  PPL 2006»
13 years 7 months ago
Microthreading a Model for Distributed Instruction-level Concurrency
This paper analyses the micro-threaded model of concurrency making comparisons with both data and instruction-level concurrency. The model is fine grain and provides synchronisati...
Chris R. Jesshope
ISCAPDCS
2001
13 years 8 months ago
Tolerating Transient Faults through an Instruction Reissue Mechanism
In this paper, we propose a fault-tolerant mechanism for microprocessors, which detects transient faults and recovers from them. There are two driving force to investigate fault-t...
Toshinori Sato, Itsujiro Arita