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ICPP
1995
IEEE
13 years 11 months ago
Hiding Miss Latencies with Multithreading on the Data Diffusion Machine
— Large parallel computers require techniques to tolerate the potentially large latencies of accessing remote data. Multithreadingis onesuch technique. We extend previous studies...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
14 years 4 days ago
Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
David I. August, Daniel A. Connors, Scott A. Mahlk...
CODES
2008
IEEE
14 years 2 months ago
Speculative DMA for architecturally visible storage in instruction set extensions
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
CGO
2003
IEEE
14 years 1 months ago
Speculative Register Promotion Using Advanced Load Address Table (ALAT)
The pervasive use of pointers with complicated patterns in C programs often constrains compiler alias analysis to yield conservative register allocation and promotion. Speculative...
Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew
EUROPAR
2007
Springer
14 years 2 months ago
Toward Scalable Matrix Multiply on Multithreaded Architectures
We show empirically that some of the issues that affected the design of linear algebra libraries for distributed memory architectures will also likely affect such libraries for s...
Bryan Marker, Field G. Van Zee, Kazushige Goto, Gr...