Sciweavers

213 search results - page 27 / 43
» Data Speculative Multithreaded Architecture
Sort
View
HPCA
2000
IEEE
14 years 1 months ago
Decoupled Value Prediction on Trace Processors
Value prediction is a technique that breaks true data dependences by predicting the outcome of an instruction, and executes speculatively its data-dependent instructions based on ...
Sang Jeong Lee, Yuan Wang, Pen-Chung Yew
SIGMOD
2008
ACM
190views Database» more  SIGMOD 2008»
14 years 9 months ago
OLTP through the looking glass, and what we found there
Online Transaction Processing (OLTP) databases include a suite of features -- disk-resident B-trees and heap files, locking-based concurrency control, support for multi-threading ...
Stavros Harizopoulos, Daniel J. Abadi, Samuel Madd...
ICS
2007
Tsinghua U.
14 years 3 months ago
An L2-miss-driven early register deallocation for SMT processors
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...
Joseph J. Sharkey, Dmitry V. Ponomarev
GIS
2000
ACM
14 years 21 days ago
A high-performance Web-based system design for spatial data accesses
With the increasing use of geographical data in real-world applications, Geographic Information Systems (GISs) have recently emerged as a fruitful area for research. Nowadays, a G...
Shu-Ching Chen, Xinran Wang, Naphtali Rishe, Mark ...
ICS
2007
Tsinghua U.
14 years 3 months ago
Tradeoff between data-, instruction-, and thread-level parallelism in stream processors
This paper explores the scalability of the Stream Processor architecture along the instruction-, data-, and thread-level parallelism dimensions. We develop detailed VLSI-cost and ...
Jung Ho Ahn, Mattan Erez, William J. Dally