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ISCAS
2007
IEEE
121views Hardware» more  ISCAS 2007»
14 years 1 months ago
Topological Placement with Multiple Symmetry Groups of Devices for Analog Layout Design
Abstract– This paper presents an improved topological algorithm for device-level analog placement with symmetry constraints. Based on the exploration of symmetric-feasible sequen...
Karthik Krishnamoorthy, Sarat C. Maruvada, Florin ...
IJCNN
2006
IEEE
14 years 1 months ago
Patterns, Hypergraphs and Embodied General Intelligence
—It is proposed that the creation of Artificial General Intelligence (AGI) at the human level and ultimately beyond is a problem addressable via integrating computer science algo...
Ben Goertzel
STOC
2003
ACM
133views Algorithms» more  STOC 2003»
14 years 7 months ago
A fast algorithm for computing steiner edge connectivity
Given an undirected graph or an Eulerian directed graph G and a subset S of its vertices, we show how to determine the edge connectivity C of the vertices in S in time O(C3 n log ...
Richard Cole, Ramesh Hariharan
GLVLSI
2006
IEEE
101views VLSI» more  GLVLSI 2006»
14 years 1 months ago
Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance
Process variations have become a serious concern for nanometer technologies. The interconnect and device variations include interand intra-die variations of geometries, as well as...
Xiaoning Qi, Alex Gyure, Yansheng Luo, Sam C. Lo, ...
KDD
2010
ACM
287views Data Mining» more  KDD 2010»
13 years 9 months ago
Designing efficient cascaded classifiers: tradeoff between accuracy and cost
We propose a method to train a cascade of classifiers by simultaneously optimizing all its stages. The approach relies on the idea of optimizing soft cascades. In particular, inst...
Vikas C. Raykar, Balaji Krishnapuram, Shipeng Yu