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HPCA
2009
IEEE
14 years 10 months ago
PageNUCA: Selected policies for page-grain locality management in large shared chip-multiprocessor caches
As the last-level on-chip caches in chip-multiprocessors increase in size, the physical locality of on-chip data becomes important for delivering high performance. The non-uniform...
Mainak Chaudhuri
SC
1992
ACM
14 years 1 months ago
Willow: A Scalable Shared Memory Multiprocessor
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...
John K. Bennett, Sandhya Dwarkadas, Jay A. Greenwo...
GI
1999
Springer
14 years 1 months ago
Caching in Networks
d Abstract) Friedhelm Meyer auf der Heide   Berthold V¨ocking† Matthias Westermann   We present a general framework for the development of online algorithms for data manageme...
Matthias Westermann
ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
14 years 4 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
VISUALIZATION
1997
IEEE
14 years 1 months ago
Application-controlled demand paging for out-of-core visualization
In the area of scientific visualization, input data sets are often very large. In visualization of Computational Fluid Dynamics (CFD) in particular, input data sets today can surp...
Michael Cox, David Ellsworth