244 search results - page 24 / 49 » Data partitioning on chip multiprocessors |
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
Increasing complexity of the functionalities and the resultant growth in number of gates integrated in a chip coupled with shrinking geometries and short cycle time requirements br...
AHS
2006
IEEE
14 years 25 days ago
2006
IEEE
This paper describes the architecture of our dynamically reconfigurable Network-on-Chip (NoC) architecture that has been proposed for reconfigurable Multiprocessor system-on-chip ...
HIPEAC
2009
Springer
13 years 10 months ago
2009
Springer
Shrinking process technologies and growing chip sizes have profound effects on process variation. This leads to Chip Multiprocessors (CMPs) where not all cores operate at maximum f...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
We are concerned with the software implementation of baseband processing for the physical layer of radio standards (“Software Defined Radio - SDR”). Given the constraints for ...
HPCC
2007
Springer
13 years 10 months ago
2007
Springer
This paper proposes a highly efficient MBRP parallel algorithm for H.264 encoder, which is based on the analysis of data dependencies in H.264 encoder. In the algorithm, the video ...